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Nanoscience & Nanotechnology-Asia

Volume 1 Issue 2
ISSN: 2210-6820
eISSN: 2210-6812

 

   All Titles

  Poly-Si Nanowire Device Technology
  pp.109-122 (14) Author: Horng-Chih Lin
doi: 10.2174/2210682011101020109
 
 
      Abstract

In this article we review the progress made in poly-Si nanowire (NW) transistor technology in recent years, with major attention paid on several device structures developed by our group. With these NW structures, superior device characteristics over the previous planar structures have been demonstrated. A common feature of fabricating these structures is that the formation of poly-Si NW can be accomplished with simple process techniques without involving advanced lithography tools and processes, such as e-beam or DUV. One important implication of this feature is that these NW structures can be readily integrated with modern poly-Si TFT-based electronics on the same panel or CMOS circuitry. This can increase the functionally of a panel and chip products. Several multi-gate (MG) configurations have been developed and characterized. Moreover, these MG structures can be designed with either common or independent gate configuration. The above NW devices have been applied to bio-logic sensor and memory applications. In the former regard, the testing is usually performed in an aqueous solution. In our experiments we've found an interesting water passivation effect. Specifically, the H-related species contained in the test solution would passivate the defects presenting at the grain boundaries of the poly-Si NW, greatly enhancing the device performance. This may further lift the concern associated with the granular structure of poly-Si NW. Finally, we've also employed the NW devices as the test vehicle and have successfully demonstrated its effectiveness in detecting the pH value of the solutions, as well as the dopamine and DNA. We've also fabricated the NW SONOS devices and showed that the use of NW can help promote the programming/erasing (P/E) speed over the planar counterparts. Moreover, the independent double-gate (DG) configuration could further help improve the P/E efficiency and provide more flexibility for read operation. These promising results indicate the great potential of the poly-Si NW devices for future 3D high-density non-volatile memory (NVM) applications.

 
  Keywords: Poly-Si, Nanowire, Multi-gate, Metal-oxide-semiconductor field-effect transistor, Bio-logical sensor, SONOS, non-volatile memory, nanostructures, poly-NWs, polycrystalline
  Affiliation: Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University (NCTU), 1001 Ta-Hsueh Rd., Hsinchu 300, Taiwan; National Nano Device Labs., 26, Prosperity Road I, Hsinchu Science Park, Hsinchu 30078, Taiwan.
 
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